Jeffrey Furman 1449 Yukon Drive Sunnyvale, CA 94087 (408) home 245-3418, cell 480-7927 jfurman@ieee.org OBJECTIVE: Software engineer in mixed signal/analog hardware development/analysis environment. SUMMARY OF QUALIFICATIONS: Experience designing and implementing real time embedded software applications and software/hardware systems for communications (switching, telecommunications, and data communications) and instrumentation (liquid chromatography, radar warning, graphic recorders, active filters). Product life cycle experience extends through architectural design, implementation, and product release. * Exceptional ability to interpret analog and digital hardware designs for software integration and troubleshooting. * Software experience supported by six years' hardware design. * Languages: C, assembly language used on COP-8 series, 680xx series, TMS340 series, 80x86 series, and network processors. * Development environments: UNIX, Windows. * Operating Systems: PSOS+, Multitask!, and proprietary. * Tools: ICE, logic analyzers, oscilloscopes, spectrum analyzers, multimeters, oscillators, signal generators, soldering irons, electronics hand tools, lathe, mill. EMPLOYMENT HISTORY: Credence Systems Corporation Milpitas, CA System Performance Engineer 2007-2008 *Corrected basic timing calibration algorithm Designed, coded, integrated C++ test programs for timing accuracy verification and data acquisition enhancement. Developed code from schematics and asic descriptions. St. Jude Medical Inc. Sunnyvale, Ca. Sr. Test Devel. Engineer 2005-2006 * Introduced automated test generation utility software. Designed, coded, and integrated assembly language test programs for implantable defibrillators using breadboard environment with ICE. Coached team members to improve speed and size of test code. Designed tests from proprietary ASIC hardware descriptions. Developed test generation methods using hardware description as input. Cisco Systems, Inc. San Jose, Ca. Software Engineer 1998-2005 * Developed TCAM diagnostic given metallization failure information. Designed, coded, and implemented diagnostic test software for card bringup, design verification test, and manufacturing test. Tested and configured complex ASICS from data sheets. Diagnosed hardware faults by planning test sequences. Discovered and corrected subtle software bugs. Coordinated hardware enhancements and new diagnostic tests. Collaborated with hardware designers to create unique test codes. TV Interactive Corp. San Jose, Ca. Senior Hardware Engineer 1997-1998 Designed, coded, and implemented real time embedded control and signal processing software for infrared keyboards and remote controls. Designed, implemented, and debugged microcontroller, smart card, I2C, and IRLED driver circuitry. Cisco/StrataCom San Jose, Ca. Senior Member of the Technical Staff 1995-1997 Designed, coded, and implemented real time embedded administrative control software for a multi T1 frame relay interface card in a WAN switch. This includes low level I/O, control and communications modules, application of PSOS+, and BERT functions. The development environment includes Sun UNIX workstations, and Windows. Thermo Separation Products San Jose, Ca Senior Software Engineer 1990-1995 * Designed and implemented router software for proprietary instrument controller. * Designed interrupt vector hardware and software to replace missing functions on alternate I/O chips. Designed, coded, and implemented packet communications software for a proprietary star structured network of chromatography instruments, including ISRs for serial I/O through UARTs, autonomous time critical control and communications modules, and router functions. Protocol developed for physical, data link, and network layers. Application and configuration of PSOS+, a real time operating system, and its associated resident debugger. Sun UNIX workstations and PC's were used for development and debug. ADDITIONAL RELEVANT EXPERIENCE: Senior Research Scientist Dalmo Victor Co. Belmont, Ca. Engineer Hewlett-Packard Co. San Diego, Ca. Engineer Burr-Brown Research Tucson, Az. PERSONAL ACCOMPLISHMENTS: * Designed modifications to transciever RF and audio analog circuits for receive incremental tuning and sidetone. * EDN open circuit analog design contest multiple prize winner. * Designed active hybrid and low IF gain/phase meter for an HF network analyzer. * Developed program for symbolic network analysis: http://www.ocs.net/~jfurman/tree43 * FCC granted Extra Class radio license. EDUCATION: MSCS, University of Santa Clara, Santa Clara BSEE, University of Arizona, Tucson, Arizona PROFESSIONAL AFFILIATIONS: IEEE Computer Society, IEEE Circuits and Systems Society, ACM SIGPLAN, SIGART, SIGARCH, SIGSAM, SIGSOFT U.S. PATENT: Amplifier circuit: 3,875,523.